Wang, XingshengXingshengWangReid, DaveDaveReidWang, LipingLipingWangBurenkov, AlexAlexBurenkovMillar, CampbellCampbellMillarCheng, BinjieBinjieChengLange, AndreAndreLangeLorenz, JürgenJürgenLorenzBär, EberhardEberhardBärAsenov, AsenAsenAsenov2022-03-122022-03-122014https://publica.fraunhofer.de/handle/publica/38524910.1109/SISPAD.2014.6931621In this paper a variability-aware compact modeling strategy is presented for 20-nm bulk planar technology, taking into account the critical dimension long-range process variation and local statistical variability. Process and device simulations and statistical simulations for a wide range of combinations of L and W are carefully carried out using a design of experiments approach. The variability aware compact model strategy features a comprehensively extracted nominal model and two groups of selected parameters for extractions of the long-range process variation and statistical variability. The unified variability compact modeling method can provide a simulation frame for variability aware technology circuit co-optimization.encompact modelMOSFETvariability621670620530004conference paper