CC BY 4.0Pfeil, FlorianFlorianPfeilFerreira, StephanieStephanieFerreiraMueller-Roemer, Johannes SebastianJohannes SebastianMueller-Roemer2025-09-302025-09-302025https://publica.fraunhofer.de/handle/publica/496459https://doi.org/10.24406/publica-557310.2312/vmv.2025124510.24406/publica-5573We present Binned Variable Block Compressed Sparse Row (Bin-VBSR), a novel GPU-optimized sparse matrix data structure and associated sparse matrix-vector multiplication algorithm for matrices with variable-size dense blocks. This includes a novel approach to handling long rows in the Binned Compressed Sparse Row (Bin-CSR) family of GPU-optimized sparse matrix data structures. We demonstrate speedups of up to 9.9× over Bin-BCSR* and extend its data compression advantages over compressed sparse row (CSR) to variable block size, resulting in an improvement of up to 50%.enBranche: Manufacturing and MobilityResearch Line: (Interactive) simulation (SIM)LTA: Machine intelligence, algorithms, and data structures (incl. semantics)Matrix representationGeneral Purpose Computation on Graphics Processing Unit (GPGPU)Parallel algorithmsFEM SimulationBin-VBSR: Variable Block Size Binned Block-Compressed Sparse Row for Efficient GPU-Accelerated Finite Element Analysisconference paper