Garzia, FabioFabioGarziaKöhler, StefanStefanKöhlerUrquijo, SantiagoSantiagoUrquijoNeumaier, PhilippPhilippNeumaierDriesen, JörnJörnDriesenHaas, SybilleSybilleHaasLeineweber, ThomasThomasLeineweberZhang, TaoTaoZhangKrause, SaschaSaschaKrauseHenkel, FrankFrankHenkelRügamer, AlexanderAlexanderRügamerOverbeck, MatthiasMatthiasOverbeckRohmer, GüntherGüntherRohmer2022-03-122022-03-122014https://publica.fraunhofer.de/handle/publica/38661810.1109/PLANS.2014.68514762-s2.0-84905017650This paper presents the overall architecture, the implementation, test setup, and first measurements results of a fully integrated multi-constellation two-frequency single-chip GNSS receiver. The ASIC supports the simultaneous reception and processing of the GPS L1/L5, Galileo E1/E5a and GLONASS G1 signals with 40 versatile tracking channels. The dual-band analog RF front-end is integrated on the same mixed-signal chip as the baseband hardware including an embedded LEON2 processor to close the tracking loops. The chip was realized in a low-power 1.2V 65nm TSMC technology.enNavigationssystemNavigationGPSGlonassGalileoconference paper