Werner, M.M.WernerStabernack, B.B.StabernackRiechert, C.C.Riechert2022-03-042022-03-042014https://publica.fraunhofer.de/handle/publica/23627410.1109/TCE.2014.67809272-s2.0-84898041647Disparity estimation is a common task in stereo vision and usually requires a high computational effort. High resolution disparity maps are necessary to provide a good image quality on autostereoscopic displays which deliver stereo content without the need for 3D glasses. In this paper, an FPGA architecture for a disparity estimation algorithm is proposed, that is capable of processing high-definition content in real-time. The resulting architecture is efficient in terms of power consumption and can be easily scaled to support higher resolutions.en643journal article