Burenkov, A.A.BurenkovLorenz, J.J.Lorenz2022-03-092022-03-092002https://publica.fraunhofer.de/handle/publica/340485The possibility to suppress the narrow channel effect due to the crowding of the leakage current near the edge of the active area in sub-quarter micrometer MOS transistors by means of a special channel stop implant has been investigated using coupled three-dimensional process and device simulation. Optimum ion implantation conditions for the suppression of the parasitic current crowding in a 0.16 µm PMOS transistor with an arsenic doped channel were found.enCMOS3D-simulationimplantationdoping distributionshallow trench isolationSTIsmall size CMOS transistorMOSFETPMOS transistor 3D simulationchannel stop implant effectnarrow channel effect suppressionactive area edge leakage current crowdingMOS Transistorcoupled 3D process/device simulationoptimum ion implantation conditionparasitic current crowding suppressionarsenic doped channel670620530conference paper