Materials, Formulation, and Processes for Semiconductor, 2.5 and 3D Chip Packaging, and High Density Interconnection PCB

Dow, W.-P.2022-03-022022-03-022018978-1-5108-7168-7978-1-62332-541-1978-1-62332-542-8978-1-60768-854-9https://publica.fraunhofer.de/handle/publica/163331Materials, Formulation, and Processes for Semiconductor, 2.5 and 3D Chip Packaging, and High Density Interconnection PCB