Publications Search Results

Now showing 1 - 10 of 157
  • Publication
    JS-002 module and product CDM result comparison to JEDEC and ESDA CDM methods
    ( 2016)
    Righter, A.
    ;
    Ashton, R.
    ;
    Carn, B.
    ;
    Johnson, M.
    ;
    Reynolds, B.
    ;
    Smedes, T.
    ;
    Ward, S.
    ;
    Wolf, H.
    CDM standard JS-002 is introduced, including the reasons for its development and the technical issues the new standard addresses. JS-002 is compared to the JEDEC JESD22-C101, ESDA and AEC Q100 CDM standards in terms of waveforms and integrated circuit pass/fail levels. JS-002 robustness levels are similar to JEDEC CDM levels.
  • Publication
    Secondary discharge - a potential risk during system level ESD testing
    ( 2015)
    Wolf, H.
    ;
    Gieser, H.
    By means of a floating handheld electronic product this work describes the influence of secondary discharge events during system level ESD testing on the failure threshold of the involved electronic circuit. In order to increase the robustness it was necessary to determine the discharge current target levels by a dedicated test set-up which was also used to verify the success of system modifications. This was a prerequisite for identifying the sensitive pins and for increasing the ESD robustness of the system.
  • Publication
    Materials for Advanced Metallization 2014 (MAM 2014). Preface
    ( 2015)
    Schulz, S.E.
    ;
    Hecker, M.
    ;
    Korner, H.
    ;
    Wolf, H.
  • Publication
    Using CC-TLP to get a CDM robustness value
    ( 2015)
    Esmark, K.
    ;
    Gaertner, R.
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    Seidl, S.
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    Nieden, F. zur
    ;
    Wolf, H.
    ;
    Gieser, H.
    Charged Device Model (CDM) like stress represents the highest ESD risk during handling of single devices. Today air discharge compromises repeatability of CDM tests of products in a package. The paper demonstrates that the repeatable Capacitive Coupled TLP (CC-TLP) reproduces CDM failure signatures at both package and wafer level. Data will be shown to compare the stress failing level and the failure locations on the chip.
  • Publication
    Multifunctional system integration in flexible substrates
    ( 2014)
    Bock, K.
    ;
    Yacoub-George, E.
    ;
    Hell, W.
    ;
    Drost, A.
    ;
    Wolf, H.
    ;
    Bollmann, D.
    ;
    Landesberger, C.
    ;
    Klink, G.
    ;
    Gieser, H.
    ;
    Kutter, C.
    In this paper we present a technology developed for reliable electrical interconnection on film substrates and between vertically stacked film layers. Applying through-hole via technologies for 3D foil stacks enables multi-functionality and RF performance combined with open form-factor and very cost-efficient manufacturing of conformable electronic modules. The manufacture of fine line metal patterns (line /space geometries below 20mm) on film substrates is performed by cost-effective roll-to-roll technology. Furthermore procedures and technologies for handling and lamination of film based sub-modules have been developed. Also the manufacture and handling of ultra-thin and flexible integrated circuits has been combined with placement of SMD type passive and with integrated printed passive components in the same technology.
  • Publication
    Transmission lines on flexible substrates with minimized dispersion and losses
    ( 2013)
    Wolf, H.
    ;
    Gieser, H.
    ;
    Maurer, L.
    This work describes the characterization of high frequency transmission lines realized on flexible substrates. In order to investigate technology related aspects influencing the performance of the transmission lines the study includes two different technologies. The first one is a commercially available process applying a subtractive layer definition on Polyimide (PI) and Liquid Cristal Polymer (LCP) substrate. The second one is a reel to reel technology applying a semi additive layer definition on PI. The characterization was performed from DC up to 60 GHz and showed for the reel to reel process a higher performance at high frequencies which is mainly attributed to the more precise layer definition.
  • Publication
    Heterointegration technologies for high frequency modules based on film substrates
    ( 2013)
    Bock, K.
    ;
    Yacoub-George, E.
    ;
    Wolf, H.
    ;
    Landesberger, C.
    ;
    Klink, G.
    ;
    Gieser, H.
    System integration technology requires multifunctionality and in many cases energy autarkic systems, very cost-efficient or open form factor solutions. Integration in plastic or foil substrates by a flex-to-flex integration concept shows the potentially free form factor which allows placing of film based systems on curved surfaces or in housings of very low thickness. Such technologies are not limited to flexible applications. They are available for optimized rigid modules and improve the heat sink by thinning and foil handling of transceiver chips or power devices. Thin semiconductor technologies are not limited to silicon, enabling also heterointegration with compound semiconductors. Meanwhile it is possible to integrate high frequency interconnects and printed passives in plastic foil and thin silicon interposer. Possible application scenarios are large area electronics in ceilings panels of cars or mobile communication systems for the "internet of things and humans".
  • Publication
    Transmission lines on flexible substrates with minimized dispersion and losses
    ( 2013)
    Wolf, H.
    ;
    Gieser, H.
    ;
    Maurer, L.
    This work describes the characterization of high frequency transmission lines realized on flexible substrates. In order to investigate technology related aspects influencing the performance of the transmission lines the study includes two different technologies. The first one is a commercially available process applying a subtractive layer definition on Polyimide (PI) and Liquid Cristal Polymer (LCP) substrate. The second one is a reel to reel technology applying a semi additive layer definition on PI. The characterization was performed from DC up to 60 GHz and showed for the reel to reel process a higher performance at high frequencies which is mainly attributed to the more precise layer definition.
  • Publication
    Modeling of TDDB in advanced Cu interconnect systems under BTS conditions
    ( 2012)
    Blský, P.
    ;
    Streiter, R.
    ;
    Wolf, H.
    ;
    Schulz, S.E.
    ;
    Aubel, O.
    ;
    Gessner, T.
    Due to the shrinking of the device size in integrated circuits together with the use of novel, less stable low-k back-end-of-line dielectrics more attention has to be paid to the time dependent dielectric breakdown (TDDB) effect. In this work the TDDB mechanisms are investigated and modeled based on constant-voltage bias-temperature stress (BTS) experiments from the 90 nm and 45 nm technology nodes. The modeling of the I-t dependencies is based on the numerical model of Haase in which it is assumed that the degradation of the dielectric is caused just by the electronic leakage current itself. By two simple modifications of the model and an adjustment of several model parameters it was possible to achieve a very good agreement between the model and the experiment for single constant-voltage BTS dependencies. For two different experimental data sets from the 45 nm technology node the TDDB behavior in dependence on the bias voltage and temperature is analyzed and compared with the results of the modified Haase model and the Poole-Frenkel lifetime model.
  • Publication
    Modeling of TDDB in advanced Cu interconnect systems under BTS conditions
    ( 2011)
    Belsky, P.
    ;
    Streiter, R.
    ;
    Wolf, H.
    ;
    Schulz, S.E.
    ;
    Aubel, O.
    ;
    Gessner, T.