Rigorous Simulation of Lithographic Exposure of Photoresist over a Nonplanar Wafer

Lithographic exposures belong to the most critical process steps in the manufacturing of microelectronic circuits. Almost all exposures are performed over nonplanar wafers. The backscattering of light from topographic features on these wafers is of increasing concern for the accuracy and stability of lithographic processes. We combine standard imaging theory and finite-difference time-domain (FDTD) algorithms to simulate several typical geometries. Consequences with respect to typical lithographic process parameters are discussed.