Back-Gated GaN-on-Si HEMTs in Multistage Cascodes

This work presents multistage cascodes by using back-gated GaN-on-Si high-electron mobility transistors (HEMTs) as direct-driven stacked follower transistors. Back-gating is to be used here as a new concept enabling depletion-mode transistors with very negative threshold voltages of about VTH, BG ≈ -300 V, instead of using the front gate for controlling the transistor, as is usually the case. The highly negative threshold reduces the number of stages required in the cascode. These self-compatible devices are used as discrete connected transistor "bricks."Characterization of back-gating provides deeper insight into this mechanism and shows a reproducible drain-source voltage-dependent threshold shift driven by lateral fields. Double-pulse measurements demonstrate high-voltage capability. With a Si-MOSFET controller transistor, a multistage cascode with two backgated follower transistors is switched up to 900 V, and exceeds therewith the lateral 600-V-class limit of conventional GaN-on-Si technologies by directly driven self-compatible back-gated GaN-HEMTs in a multistage cascode. In another assembly, voltages up to 850 V are demonstrated using a cascode with a normally-OFF GaN controller transistor. A key finding is the leakage management: buffer leakage from upper back-gated transistors requires a bypass. Without a highly ohmic resistor in parallel to the controller transistor, leakage higher its drain voltage, increases vertical field stress above the follower, and risks damage. Thus, back-gated GaN-HEMTs in multistage cascodes offer a solution to exceed the lateral 600-V-class limit of today's established GaN-on-Si technologies.