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  4. Capillary-assisted automated silver direct bond of chip-on-chip through a novel sponge-dipping approach
 
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2026
Journal Article
Title

Capillary-assisted automated silver direct bond of chip-on-chip through a novel sponge-dipping approach

Abstract
Silver direct bonding is an organic-free joining technique for chip-on-chip power electronic assemblies that eliminates the need for sinter paste, but also removes the temporary chip-tacking function that the paste normally provides. This paper presents a simple and cost-effective sponge-dipping approach, in which a water-soaked sponge module is integrated into a conventional pick-and-place process. The resulting capillary forces retain the chips in position during multi-chip stacking without requiring a dedicated dispensing unit or hydrophobic surface patterning. Experiments on five-chip stack assemblies with three chip footprints (4 × 4, 8 × 8, and 10 × 10 mm²) show that capillary assistance increases the yield to 100% for the two larger footprints, eliminates complete placement failures across all chip sizes, and reduces misalignment. SAM and cross-sectional SEM/EDX analyses reveal no significant mineral contamination at the Ag-Ag bonding interface, indicating that the applied DI water does not measurably affect bond quality under the tested conditions.
Author(s)
Weber, Jonas  orcid-logo
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Rauh, Hubert  
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Leib, Jürgen  
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
März, Martin  
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Journal
IEEE transactions on components, packaging and manufacturing technology  
Open Access
File(s)
Download (1.34 MB)
Rights
CC BY 4.0: Creative Commons Attribution
DOI
10.1109/TCPMT.2026.3721915
10.24406/publica-10266
Additional link
Full text
Language
English
Fraunhofer-Institut für Integrierte Systeme und Bauelementetechnologie IISB  
Keyword(s)
  • Accuracy

  • Assembly systems

  • Bonding

  • Semiconductor device packaging

  • Stacking

  • Surface contamination

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