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Advanced Packaging Cost Reduction by Selective Copper Metallization

 
: Mavliev, R.; Gottfried, K.; Rhoades, R.

:

Institute of Electrical and Electronics Engineers -IEEE-:
IEEE 70th Electronic Components and Technology Conference, ECTC 2020. Proceedings : 3 - 30 June 2020, Orlando, Florida, Virtual
Los Alamitos, Calif.: IEEE Computer Society Conference Publishing Services (CPS), 2020
ISBN: 978-1-7281-6180-8
ISBN: 978-1-7281-6181-5
S.327-332
Electronic Components and Technology Conference (ECTC) <70, 2020, Online>
Englisch
Konferenzbeitrag
Fraunhofer ENAS ()

Abstract
Thin film deposition of metals is necessary in the fabrication sequence of most electronic devices, but much of the deposited metal is actually wasted in the subsequent patterning steps. In the case of copper interconnects for advanced semiconductor chips, a blanket layer of Cu is electroplated over the entire wafer to fill tiny trenches etched into a dielectric layer, then all of the metal in the field areas is removed by chemical mechanical planarization (CMP). In other devices, the conductive layer may be aluminum or some other metal, and the patterning may be based on photo and etch steps, but in nearly all cases, a large percentage of the initial metal is removed and sent down the drain or out the process gas exhaust. In recent years, packaging technologies and MEMS devices have adopted similar processes for metal layers, many of which involve even thicker layers and even more wasted metal. In all of these process sequences, substantial savings could be realized if the metal could be deposited in a selective manner and focused primarily into the features of interest rather than depositing a blanket layer.A novel method for selective deposition (Selectroplating®) has been developed and evaluated for several such metallization applications. This technology is based on a selective chemical modification (SCM) of field areas of a wafer and can be implemented for either a fill-based integration, such as Cu dual damascene, or an additive process such as plating of wide conductive lines. In either integration, the primary benefit of selective deposition is to prevent metal from being deposited in areas between desired features thus eliminating the need to remove excess bulk in the next step. Cost savings is realized in two ways: 1) less metal is consumed from the plating bath thus extending bath life and lowering the average deposition cost, and 2) substantially less bulk metal must be removed in the subtractive step which lowers the polish or etch time.

: http://publica.fraunhofer.de/dokumente/N-614661.html