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Realization of system-in-package modules by embedding of chips

: Boettcher, L.; Manessis, D.; Ostmann, A.; Reichl, H.

International Microelectronics Assembly and Packaging Society -IMAPS-:
IMAPS International Conference and Exhibition on Device Packaging - In Conjunction with the Global Business Council, GBC 2008 Spring Conference
International Conference and Exhibition on Device Packaging <4, 2008, Fountain Hills/Ariz.>
Fraunhofer IZM ()

Technologies for the embedding of active and passive components into build up layers of substrates have attracted increasing attention during recent years. Different embedding technologies have been developed due to different requirements with respect to electrical performance, chip dimensions, and interconnection [1], [2], [3], [4]. Some of those technologies are now mature enough for ramp up in large scale production in the mobile communication sector. In this paper the realization of packages and System-in- Packages (SIP) with embedded components will be presented. Embedding technologies developed at Fraunhofer IZM for thin integrated active or passive chips into build up layers into printed circuit boards will be described. The embedding of silicon chips is a die bond process followed by lamination and micro via formation with subsequent interconnection and structuring. Embedding of semiconductor chips into substrates has several advantages. It allows a very high de gree of miniaturization, due to the possibility of sequentially stacking of multiple layers containing embedded components. A further advantage is the beneficial electrical performance by short and geometrically well controlled interconnects. Furthermore the embedding gives a homogeneous mechanical environment of the chips, resulting in good reliability.