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Reliability aspects of embedded chips

: Ostmann, A.; Manessis, D.; Cauwe, M.; Sommer, J.-P.

International Microelectronics and Packaging Society -IMAPS-:
EMPC 2007, the 16th European Microelectronics and Packaging Conference & Exhibition. Proceedings. Pt. 1 : June 17 - 20, 2007, Oulu, Finland
Oulu, 2007
ISBN: 978-952-997511-2
European Microelectronics and Packaging Conference and Exhibition (EMPC) <16, 2007, Oulu>
Fraunhofer IZM ()

In the framework of the European project "HIDING DIES" an innovative chip embedding technology for integration of active component into printed circuit boards (PCBs) has been developed. Besides the successful development of a technology platform for chip embedding in the PCB manufacturing flow, the reliability of test vehicles was assessed. In this paper experimental results of reliability tests will be discussed. The tests were performed using thin chips, embedded into build-up layers of PCBs. The chip thickness was 50 m and the sizes varied from 2.5×2.5 mm2 to 10×10 mm2. The performed tests were high temperature storage, humidity storage, thermal shock and reflow tests. Additionally experiments with embedded Si chips without interconnects were performed in order to investigate the polymer interface behaviour after stress conditions. Finite element simulations were used for thermo-mechanical pre-optimization with respect to the desired functionality and operating condi tions. Reliability aspects were also investigated numerically before first tests with real devices were available, revealing points of potential defects.