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The challenge of ultra thin chip assembly

 
: Feil, M.; Adler, C.; Hemmetzberger, D.; König, M.; Bock, K.

:

IEEE Components, Packaging, and Manufacturing Technology Society; Electronic Industries Alliance -EIA-; Electronic Components, Assemblies, and Materials Association:
54th Electronic Components & Technology Conference 2004. Proceedings. Vol.1 : Las Vegas, Nevada, USA, June 1 - 4, 2004
Piscataway, NJ: IEEE Service Center, 2004
ISBN: 0-7803-8365-6
ISBN: 0-7803-8366-4
S.35-40
Electronic Components and Technology Conference (ECTC) <54, 2004, Las Vegas/Nev.>
Englisch
Konferenzbeitrag
Fraunhofer IZM ()

Abstract
Because of their low height, the low assembly topography and their mechanical flexibility, ultra thin chips (about 20 µm) offer a wide field of possible applications. During the last years, we have successfully investigated in production, handling and assembly processes for such thin ICs. The chip handling and assembly processes had to be adapted to the very thin material, beginning with the development of special “Dicing by Thinning” process. A new pick and place process using thermal releasable tapes has been developed. For the chip assembly and contacting various methods depending on the application are available. The complete process chain from wafer processing up to the assembled ultra thin IC together with some application examples is discussed.

: http://publica.fraunhofer.de/dokumente/N-120038.html