Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.
2019Identification of Soft Failure Mechanisms Triggered by ESD Stress on a Powered USB 3.0 Interface
Koch, Sebastian; Orr, Benjamin J.; Gossner, H.; Gieser, Horst A.; Maurer, Linus
Journal Article
2018Comparison of CDM and CC-TLP robustness for an ultra-high speed interface IC
Weber, Johannes; Fung, Rita; Wong, Richard; Wolf, Heinrich; Gieser, A. Horst; Maurer, Linus
Conference Paper
2007Investigating the CDM susceptibility of ICs at package and wafer level by capacitive coupled TLP
Wolf, H.; Gieser, H.; Walter, D.
Conference Paper
2007Investigations with the capacitive coupled TLP on package and wafer-level
Wolf, H.; Gieser, H.
Conference Paper
2007Survey on very fast TLP and ultra fast repetitive pulsing for characterization in the CDM-domain
Gieser, H.A.; Wolf, H.
Conference Paper
2003A traceable method for the arc-free characterization and modeling of CDM-testers and pulse metrology chains
Gieser, H.; Wolf, H.; Soldner, W.; Reichl, H.; Andreini, A.; Natarajan, M.I.; Stadler, W.
Conference Paper
2002ESD circuit simulation for the prevention of ESD failures. Application to products in a 0.18 µm CMOS technology
Wolf, H.; Gieser, H.; Stadler, W.; Esmark, K.
Conference Paper
2002ESD in silicon integrated circuits
Anderson, W.; Gieser, H.; Ramaswamy, S.
: Amerasekera, E.A.; Duvvury, C.
2001Elektrostatik - Ursachen, Wirkungen und Maßnahmen
Matuschek, P.
Conference Paper
2000Analyzing the switching behavior of ESD-protection transistors by very fast transmission line pulsing
Wolf, H.; Gieser, H.; Wilkening, W.
Journal Article