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Design and performance of a 10MHz CMOS analog pipeline

: Caldwell, A.; Hayes, C.; Hervas, L.; Hofmann, A.; Klanner, R.; Kötz, U.; Malecki, P.; Peso, J. del; Sippach, W.; Buttler, W.; Hosticka, B.J.; Möschen, J.; Schöneberg, U.

Nuclear instruments and methods in physics research, Section A. Accelerators, spectrometers, detectors and associated equipment 277 (1989), S.217-221
ISSN: 0167-5087
ISSN: 0168-9002
Fraunhofer IMS ()
CMOS analog pipeline

The development of an analog pipeline which will be used for the readout of the ZEUS high-resolution calorimeter is described. The pipeline will be built in CMOS-technology and will use the switched capacitor technique. Performance tests of a test chip which incorporates the main features of the pipeline are presented. The following results on the main parameters have been achieved: dynamic range about 8000:1, chargeup time better than 4 ns, timing accuracy better than 1 ns. First results on radiation sensitivity show that the chip operates properly up to 5 krad. On the basis of these results an improved design of a prototype chip has been started.