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A basic design guide for CMOS folding and interpolating A/D converters - overview and case study


International Conference on Electronics, Circuits and Systems 1999. Proceedings
Piscataway, NJ: IEEE, 1999
ISBN: 0-7803-5682-9
ISBN: 0-7803-5691-8
International Conference on Electronics, Circuits and Systems <6, 1999, Pafos>
Fraunhofer IMS ()
analogue-digital conversion; comparator; folder; folding/Interpolation; Interpolation; Konverter; leistungsarmes Bauelement; low power

The design techniques for analog-to-digital converters (ADCs) require careful optimization in order to minimize the amount of hardware required and enable economical monolithic integration. A basic architectural design guide dedicated to folding and interpolating ADCs is outlined and described. A case study for a 10bit ADC is treated under consideration of different folding and interpolating factors. The trade-off between chip area, power dissipation, and ADC performance is characterized according to the diverse design variables.