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A basic design guide for CMOS folding and interpolating A/D converters

Overview and case study. abbreviated from the same paper in ICECS '99
 

Laboratoire d'Electronique Generale, Lausanne:
International Workshop on Low Power RF Integrated Circuits 1999
Lausanne, 1999
International Workshop on Low Power RF Integrated Circuits <1999, Lausanne>
Englisch
Konferenzbeitrag
Fraunhofer IMS ()
analogue-digital conversion; comparator; folder; folding/Interpolation; Interpolation; Konverter; leistungsarmes Bauelement; low power

Abstract
The design techniques for analog-to-digital converters (ADCs) require careful optimization in order to minimize the amount of hardware required and enable economical monolithic integration. A basic architectural design guide dedicated to folding and interpolating ADCs is outlined and described. A case study for a 10bit ADC is treated under consideration of different folding and interpolating factors. The trade-off between chip area, power dissipation, and ADC performance is characterized according to the diverse design variables.

: http://publica.fraunhofer.de/dokumente/PX-5615.html