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Verfahren zur vertikalen Integration mikroelektronischer Systeme

Process for the vertical integration of microelectronic systems
: Ramm, P.

Frontpage ()

DE 1995-19516487 A: 19950505
DE 1995-19516487 A: 19950505
DE 19516487 C1: 19960725
Patent, Elektronische Publikation
Fraunhofer IZM ()

The invention relates to a process for the vertical integration of microelectronic systems. The process can be performed using CMOS-compatible standard semiconductor technologies and permits a reduction in throughput times in production compared with known processes and can increase yield. In the process according to the invention, the individual component layers are processed independently of each other in different substrates and are then joined together. Firstly through-plated holes are opened on the front side of a finish-processed top substrate, said holes penetrating all existing component layers. This is followed by connecting a finish-processed bottom substrate to the top substrate front to front. Then the top substrate of the resulting substrate stack is thinned from the rear up to the through-plated holes. Finally the opened through-plated holes are lengthened through the remaining layers through to a metallization plane of the bottom substrate and the electrical contact is m ade between the top and bottom substrates.