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Title
Verfahren zur Gehaeusung von integrierten Schaltkreisen
Date Issued
1998
Author(s)
Feil, M.
Patent No
1997-19702186
Abstract
The support substrate (4) has a front- and a rear-side main surface, each containing electrical terminal faces (7,8). The front face (7) couples to rear face (8) via through-contacts (9). The front-side main surface of the semiconductor substrate (1) is aligned with the front-side main surface of the support substrate such that terminal faces to be coupled are opposite each other. The two front-side main surfaces are interconnected so as to render the mechanical connection between the semiconductor and support substrates electrically conductive between the respective terminal faces. Preferably the semiconductor substrate is a wafer with several integrated circuits. USE/ADVANTAGE - For chip size packages. No danger of yield reduction.
Language
de
Patenprio
DE 1997-19702186 A: 19970123