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Submicron silicon bipolar master-slave D-type flip-flop for use ad 8.1 Gbit/s decision circuit and 11.2 Gbit/s demultiplexer

 
: Runge, K.; Glimett, J.L.; Way, W.; Kipnis, I.; Snapp, C.; Clawin, D.; Cheung, N.K.

Electronics Letters 25 (1989), Nr.20, S.1346 - 1347
ISSN: 0013-5194
Englisch
Zeitschriftenaufsatz
Fraunhofer IMS ()
bipolar device; integrated circuit; logic; logic design; optical communications

Abstract
We have designed and implemented a submicron silicon bipolar master-slave D-type flip-flop integrated circuit which can be used either as a decision circuit or a demultiplexer, operating at data rates as high as 8.1 and 11.2 Gbits/s, respectively. The circuit was fabricated using a 0.6 fm, nonpolysilicon emitter technology, occupying an area of 0.8mm x 0.9 mm, and dissipating 410mw of power.

: http://publica.fraunhofer.de/dokumente/PX-35288.html