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SOI-CMOS technology with monolithically integrated active and passive RF devices on high resistivity SIMOX substrates


Mayer, D.C.; Fossum, J.G.; Allen, L.; Yoshino, A.; Krause, S. ; IEEE Electron Devices Society:
International SOI Conference 1996. Proceedings
Piscataway, N.J.: IEEE, 1996
ISBN: 0-7803-3315-2
ISBN: 0-7803-3316-0
ISBN: 0-7803-3317-9
International SOI Conference <1996, Sanibel Island/Fla.>
Fraunhofer IMS, Außenstelle Dresden ( IPMS) ()
CMOS; CMOS-Technik; Hochfrequenztransistor; induktive Spule; passives Bauelement; SIMOX; Wellenleiter

A silicon-on-insulator (SOI) CMOS technology has been developed for microwave applications up to 5 GHz. The technology is based on a 0.8 mu m CMOS VLSI-process on high resistivity subtrates using Ti salicide and metal reinforced gates. Special RF NMOS and PMOS FET's with an effective channel length of 0.3 mu m and 0.25 mu m respectively give maximum frequencies of operation fmax of 24.3 GHz (NMOS) and 11.8 GHz (PMOS). Passive RF devices like metal-insulator-metal (MIM) capacitors with 30...80 nF/cm2, planar inductors with a quality factor up to 12 and coplanar waveguides with low loss <1.5 dB/cm at 5 GHz were realized.