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Single chip hardware support for rasterization and texture mapping

: Ackermann, H.-J.

Straßer, W. ; Centrum voor Wiskunde en Informatica -CWI-, Amsterdam:
10th Eurographics Workshop on Graphics Hardware : MECC, Maastricht August 28 - 29, 1995 / Eurographics '95
Maastricht: MECC, CWI, 1995 (Eurographics Workshop Proceedings Series EG 95 HW)
Eurographics Workshop on Graphics Hardware <10, 1995, Maastricht>
Fraunhofer IGD ()
chip design; hardware; MIPmap; perspective mapping; texture mapping; triangle shading

Today's interactive 3D-applications on PCs demand efficient hardware support for functionality, e.g. shading and texture mapping. In this paper, I present an ASIC that integrates most of the 3D-related funcionality defined in Intel's de-facto standard 3DR. As the chip was designed for real time environmental simulation systems, the main focus has been on texture mapping, which provides the most natural appearance at a moderate effort level. To avoid artifacts during texture mapping, the chip performs bi- or tri-linear blending on a MIPmap structure. Texture addresses are calculated perspective correct. A crucial problem concerning the tri-linear blending is the necessary data bandwidth between ASIC and the texture buffer. Therefore, I discuss several memory types and architctures for the texture buffer depending on performance, price and board space requirements. A short overview of different system architectures using the ASIC concludes the paper.