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1998
Conference Paper
Titel
Reliability investigations of Sn/Pb and lead free solders for flip chip technology
Abstract
This paper presents a flip chip technique based on electroless Ni-Au bumping and stencil printing of solder paste on wafers. The process steps and key aspects are described in detail. Experimental results for an ultra fine pitch printing technique on wafers are shown and reflowed solder bumps are characterized in terms of uniformity and strength. In comparison to eutectic SnPb solder, five alloys (BiSn, SnBiCu, SnAg, SnCu, AuSn) are investigated. In the second part of the paper, a comparison of solder alloy properties for applicability to flip chip technology, microstructure evaluation and phase compositions are presented. Microstructure coarsening and phase growth after thermal aging are also investigated. In order to assess the effect of substrate CTE on reliability, flip chip assembly was performed on LTTC and FR-4 substrates. Flip chip joint quality was investigated by metallurgical cross sections and electrical and mechanical measurements. Finally, joint reliability results after thermal cycling with and without underfill on both substrate types are presented.
Language
English
Tags
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ageing
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crystal microstructure
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electroless deposition
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encapsulation
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environmental factors
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fatigue
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fine-pitch technology
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flip-chip devices
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integrated circuit metallisation
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integrated circuit packaging
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integrated circuit reliability
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mechanical strength
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microassembling
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reflow soldering
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thermal expansion
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thermal stress