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Accelerated logic simulation by using prototype boards

 
: Haufe, J.; Schwarz, P.; Berndt, T.; Große, J.

European Design Automation Association -EDAA-; IEEE Computer Society, Technical Committee on Test Technology; Electronic Design Automation Consortium -EDAC-:
Design, automation and test in Europe 1998. Proceedings
Los Alamitos: IEEE Computer Society, 1998
ISBN: 0-8186-8359-7
ISBN: 0-8186-8361-9
S.183-189
Design, Automation and Test in Europe Conference (DATE) <1998, Paris>
Englisch
Konferenzbeitrag
Fraunhofer IIS A ( IIS) ()

Abstract
Simulation plays the most important role for the verification of digital circuits. Designers demand more and more speed for their simulation processes. Therefore, we have worked out an approach to accelerate logic simulation by using prototype boards. We developed a novel simulator/hardware interface to achieve a significant speed-up. A speed-up of about 100 was obtained in several cases. The benefits and limits of our technique are explained.

: http://publica.fraunhofer.de/dokumente/PX-3100.html