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Process technology for InGaAs/InAlAs modulation doped field effect transistors on InP substrates

Prozeßtechnologie für InGaAs/InAlAs-MODFETs auf InP-Substrat
 

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Journal of vacuum science and technology B. Microelectronics and nanometer structures 12 (1994), Nr.6, S.3332-3336 : Abb.,Tab.,Lit.
ISSN: 0734-211X
ISSN: 1071-1023
Englisch
Zeitschriftenaufsatz
Fraunhofer IAF ()
Bauelement-Isolation; device isolation; Gate-Recess-Ätzung; gate recess etching; InGaAs/InAlAs MODFET; process technology; Prozeßtechnologie

Abstract
We present a process for fabricating lattice-matched InGaAs/InAlAs modulation doped field effect transistors (MODFETs) on InP wafers including molecular beam epitaxial growth of a high electron mobility transistor structure consisting of In sub0.53 Ga sub0.47 As and In sub0.52 Al sub0.48 As layers, and electron-beam lithography for gate definition. For selective gate recessing we investigated both wet and dry etch processes. Viable procedures have been found with a citric acid: H2O2:H20 wet etching solution and with an HBr/Ar gas mixture for reactive ion etching (RIE). The selectivities obtained for InGaAs with respect to InAlAs were 14:1 for the wet etchant and 6.7:1 for RIE. Another crucial process step is the MODFET isolation. Earlier work by other groups has shown that implant isolation is difficult on InGaAs (S. J. Pearton et al., Mater. Res. Soc. Symp. Proc. 144, 433 (1989)).Therefore, we studied both oxygen ion implantation as well as wet-chemical mesa etching for device isolati on on the same wafer. Although the isolation sheet resistance achieved with ion implantation is inferior to that obtained in a mesa process, we found similar MODFET performance for both approaches. For devices with a 0.3-mym gate length and 1.3-mym source-drain distance, a transconductance of more than 600 mS/mm and threshold voltages of -1.3 and -0.6 V for wet and dry recessed transistors, respectively, were obtained. Wafer mapping measurements showed that the MODFET data are uniform over an entire 2-in. wafer and also from wafer-to-wafer within a batch.

: http://publica.fraunhofer.de/dokumente/PX-29461.html