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A 4 Gs/s and 10 mV latched comparator in 0.5 mu m GaAs HEMT technology

 

Institute of Electrical and Electronics Engineers -IEEE-:
ESSCIRC '91. 17th European Solid State Circuits Conference. Proceedings
Milano: Tecniche Nuove, 1991
S.109-112
European Solid State Circuits Conference <17, 1991, Milano>
Englisch
Konferenzbeitrag
Fraunhofer IIS A ( IIS) ()
comparator; HEMT; high electron mobility transistor; high-speed circuit; Hochgeschwindigkeitsschaltung; Komparator

Abstract
A high performance latched comparator is implemented in a 0.5 mu m GaAs HEMT technology. Measurement results verify the comparator is able to operate up to 4 Gs/s and has a 10 mV sensitivity.

: http://publica.fraunhofer.de/dokumente/PX-2796.html