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A novel approach for an on-line selftest architecture using ASIC circuits in a multi-channel system

 
: Kuntzsch, C.; Mayer, F.; Ronge, K.

Institute of Electrical and Electronics Engineers -IEEE-:
3rd IEEE International On-Line Testing Workshop 1997. Proceedings
S.l.: IEEE, 1997
S.165-168
International On-Line Testing Workshop (IOLTW) <3, 1997, Aghia Pelaghia, Crete>
Englisch
Konferenzbeitrag
Fraunhofer IIS A ( IIS) ()
ASIC; ASIC microcontroller; ASIC Mikroprozessor; Bahntechnik; capture register; fail stop controller; fail-stop Mechanismus; IEC 1508; on-line compare; On-line Vergleich; railroad application; safety critical application; Schattenregister; Selbsttest; selftest; sicherheitskritische Anwendung; two channel system; zweikanaliges System

Abstract
This paper presents a universal on-line selftest architecture for safety critical controller systems. The solution is applicable for dual or multiple channel systems built with ASIC circuits. The selftest module performs an Online Capture and Compare (OCC) of critical chip-internal signal values. The novel comparison structure we built is independent of the controller architecture and has no impact on the normal system performance. The requirements for area and power are depending on the amount of compare points. The controller itself has a gate count of 472 gate equivalents. For the capture register a value of 7.5 GE per captured signal has to be added.

: http://publica.fraunhofer.de/dokumente/PX-26554.html