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A new 8 bit C-programmable microcontroller for embedded multitasking applications


Garda, P.:
ESSCIRC '95. 21th European Solid State Circuits Conference. Proceedings
Gif-sur-Yvette: Editions Frontieres, 1995
ISBN: 2-86332-180-3
European Solid State Circuits Conference <21, 1995, Lille>
Fraunhofer IMS ()
interrupt; microcontroller; RISC-processor; task management

A new 8 bit microcontroller with reduced instruction set has been designed. The controller, code named T2, has been developed especially for embedded controller applications which require multitasking and fast interrupt handling at medium data throughput. Futhermore the architecture was designed to be programmed in C. To support these requirements, the controller has 256 programmer visible registers and 256 Byte of on chip RAM. The instruction set consists of (basically) 20 instructions and instruction groups and provides an efficient target for C compilers. The instruction set and the datapath with may be adapted to the applications needs using a full top-down synthesis flow. The adress width for external and programm memory is 16 bit. The target clock frequency is 16 MHz. The industrial significance of this development is shown by the rapidly growing demand for code efficience HLL-programming in the 'embedded' market.