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Low cost flip chip bonding on FR-4 boards

: Klöser, J.; Zakel, E.; Reichl, H.

Circuit World 22 (1995), Nr.1, S.18-21
ISSN: 0305-6120
Fraunhofer IZM ()
thermal stress cracking; adhesion; assembling; circuit reliability; encapsulation; fatigue; flip-chip devices; heat treatment; integrated circuit interconnections; integrated circuit packaging; metallisation; minimisation; printed circuit manufacture; printed circuit testing; Soldering; thermal expansion

Flip-chip technology used directly on printed wiring boards offers minimisation of geometric parameters on conventional low-cost substrates as well as reduction in interconnect distances and inductances, particularly in high frequency applications. This paper describes the investigations of alternative low-cost flip-chip mounting processes using Au and Ni-Au bumps on organic laminate substrates (FR-4). The wiring planes of the PWBs are made by copper plating. The contact pads are topped with an electroplated Sn/Pb-63/37 eutectic solder. Flip-chip mounting was performed with and without flux application. The fatigue life of solder joints, which is limited by the thermal expansion mismatch between chip and substrate, could be significantly increased by a compatible flip-chip encapsulation process. First reliability results of metallurgical analysis and mechanical and electrical behaviour of the different flip-chip joints after thermal cycling between -55 degrees C and +125 degrees C are presented.