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Low cost bumping by stencil printing. Process qualification for 200 mu m pitch


Welterlen, J.D. ; International Microelectronics and Packaging Society -IMAPS-:
International Symposium on Microelectronics 1998. Proceedings : November 1 - 4, 1998, San Diego Convention Center, San Diego, California
Reston, Va.: IMAPS, 1998 (SPIE Proceedings Series 3582)
ISBN: 0-930815-52-1
International Symposium on Microelectronics <1998, San Diego/Calif.>
Fraunhofer IZM ()
fine-pitch technology; flip-chip devices; integrated circuit interconnections; integrated circuit packaging; integrated circuit yield; quality control; Soldering; surface topography

A key issue for the introduction of flip chip technology for automotive, telecommunication and consumer applications is the implementation of low cost bumping processes, since the established methods need expensive equipment for metal sputtering and photolithography. At present, there are several methods for creating bumps on the die. One new method that has the potential to be much less expensive than current technologies is stencil printing. In this paper, the stencil printing method for wafer solder bumping is described using electroless nickel as a layer between the IC bond pad and the solder. Stencil printing for SMT and fine pitch BGA structures is established as a low cost standard process. Using the same equipment with modified printing parameters and materials, a low cost wafer bumping process has been transferred to serial production. This paper presents the results of ultra fine pitch stencil printing of solder paste on wafers (down to 200 mu m and 150 mu m pitch) discussing quality and yield. A software tool for stencil layout design was developed and predicted bump heights are compared to experimental results. In the first part of the paper, the process flow of this economical bumping method for flip chip technology is described in detail. The key aspects of solder paste printing with optimized aperture size and shapes are outlined and the printing results are presented. In the second part of the paper, a comparison of measured standard deviations of bump heights and the quality demands for ultra fine pitch flip chip assembly are also shown.