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HIPARE. Hierarchial circuit and parameter extraction from mask layout data

 
: Fritz, J.; Hess, G.; Krohm, F.; Röttcher, U.

Reusch, B.:
Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme
Berlin/West: Springer, 1990 (Informatik-Fachberichte 255)
S.24-31
GME/GI/ITG-Fachtagung <1990, Dortmund>
Englisch
Konferenzbeitrag
Fraunhofer IMS ()
circuit extraction; layout parasitics; layout verification; parameter extraction

Abstract
HIPARE performs hierarchical circuit and parameter extraction from mask layout data including non-Manhattan geometries. Due to its programming modularity and a powerful set of layout operations HIPARE is very flexible in adapting to different technologies and can compute almost all usual device types and their parameters. Additionally, sophisticated algorithms for detailed parasitics such as resistances, intrinsic and internodal capacitances of arbitrary conductors have been implemented. Hierarchical analysis is based on user-defined abstract representation of cells allowing overlaps and inner-cell interfaces.

: http://publica.fraunhofer.de/dokumente/PX-17243.html