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GaAs FET analog switch
: Feng, S.; Sauerer, J.; Seitzer, D.

Frontpage ()

DE 1992-4237925 A: 19921110
DE 1992-4237925 A: 19921110
EP 1993-113518 A: 19930824
DE 4237925 C2: 19940915
EP 597200 B1: 19960925
Patent, Elektronische Publikation
Fraunhofer IIS ()

A GaAs FET analog switch comprises an input node, an output node and a terminating element which can be designed as a holding capacitor which is connected to the output nodes. Between the two nodes is a switching transistor. A drive circuit controls the gate of the switching transistor as a function of a scanning control signal. To avoid transient errors, fault voltages in switched-off state and switching noise during switch-on state with a short transient time, the invention proposes to insert a dummy transistor between the input of the analog switch and the source electrode of the switching transistor and a dummy transistor between the train electrode between the switching transistor and the output node of the GaAs FET analog switch. Furthermore, the invention proposes to use a second drive circuit which serves to drive the gate of the two dummy transistors at opposite phases to the control circuit with which the first driver circuit controls the gate of the switching transistor.