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Dynamic compression for sampled-data signals in analog integrated CMOS circuits

: Uhlemann, V.; Hosticka, B.J.; Klinke, R.


Choma, J.; Ng, T.T. S.; Liou, M.; Kang, S.; Siu, W.-C. ; IEEE Circuits and Systems Society:
Circuits and systems in the information age. Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Vol.3
Piscataway, NJ: IEEE, 1997
ISBN: 0-7803-3583-X
ISBN: 0-7803-3584-8
ISBN: 0-7803-3585-6
ISBN: 0-7803-3586-4
International Symposium on Circuits and Systems (ISCAS) <30, 1997, Hong Kong>
Fraunhofer IMS ()
Netzwerksynthese; Schaltungsentwurf; Schaltungstheorie

A novel integrated CMOS circuit for signal compression of analog sampled-data signals is presented. It provides charge readout and amplification featuring very high dynamic range, which is useful in applications of capacitive detector arrays or capacitive sensors. The output voltage is proportional to the square-root of the input signal. In this contribution we describe the circuit chip and demonstrate its operation.