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Strained silicon on wafer level by waferbonding: Materials processing, strain measurements and strain relaxation

: Reiche, M.; Moutanabbir, O.; Himcinschi, C.; Christiansen, S.; Erfurth, W.; Gösele, U.; Mantl, S.; Buca, D.; Zhao, Q.; Loo, R.; Nguyen, D.; Muster, F.; Petzold, M.


Suga, T. ; Electrochemical Society -ECS-, Electronics and Photonics Division:
Semiconductor Wafer Bonding 10. Science, Technology, and Applications : Tenth International Symposium on Semiconductor Wafer Bonding; Honolulu, Hawaii, on October 14-16, 2008
Pennington: Electrochemical Society, 2008 (ECS transactions 16,8)
ISBN: 978-1-56677-654-7
ISBN: 978-1-60768-007-9
ISSN: 1938-5862
International Symposium on Semiconductor Wafer Bonding: Science, Technology, and Applications <10, 2008, Honolulu/Hawaii>
Pacific Rim Meeting on Electrochemical and Solid-State Science (PRiME) <2008, Honolulu/Hawaii>
Electrochemical Society (Meeting) <214, 2008, Honolulu/Hawaii>
Electrochemical Society of Japan (Fall Meeting) <2008, Honolulu/Hawaii>
Fraunhofer IWM ()
strained silicon; uniaxial strain; biaxial strain; strained silicon on insulator; CMOS devices; local stressors

Different methods to introduce strain in thin silicon device layers are presented. Uniaxial strain is introduced in CMOS devices by process-induced stressors allowing the local generation of tensile or compressive strain in the channel region of MOSFETs. Biaxial strain is introduced by growing of thin silicon layers on SiGe buffers and their transfer to oxidized silicon substrates. The latter forms strained silicon on insulator (SSOI) wafers characterized by tensile strain only. Future CMOS device technologies require the combination of the global strain of SSOI substrates with local stressors to increase the device performance.