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Minimizing the electrical losses on the front side: Development of a selective emitter process from a single diffusion

: Haverkamp, H.; Shirazi, A.; Raabe, B.; Book, F.; Hahn, G.


IEEE Electron Devices Society:
33rd IEEE Photovolatic Specialists Conference, PVSC 2008. Proceedings. Vol.1 : San Diego, CA, May 11 - 16, 2008
Piscataway, NJ: IEEE, 2008
ISBN: 978-1-4244-1640-0
ISBN: 1-4244-1640-X
ISBN: 978-1-4244-1641-7
Photovoltaic Specialists Conference (PVSC) <33, 2008, San Diego/Calif.>
Fraunhofer ISE ()

In this paper we present latest results in the development of a process for the fabrication of a selective emitter structure on mono- and multicrystalline silicon solar cells. The process is based on an approach that was first introduced by Zerga et al. [1]. We have chosen a wet chemical route for an emitter etch back where the areas of the wafer that are intended for emitter metallization are shielded from etching by a screen printable etch barrier. The etch barrier is later removed by wet chemical etching. The process has yielded a gain in open circuit voltage of more than 1% and a gain in short circuit current of more than 2%. The overall efficiency gain was more than 0.3%abs due to slightly lower fill factor of the cells.