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Advanced annealing strategies for the 32 nm node

 
: Kampen, C.; Martinez-Limia, A.; Pichler, P.; Burenkov, A.; Lorenz, J.; Ryssel, H.

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Institute of Electrical and Electronics Engineers -IEEE-:
SISPAD 2008, International Conference on Simulation of Semiconductor Processes and Devices : September 9 - 11, 2008, Yumoto Fujiya Hotel, Hakone, JAPAN
New York, NY: IEEE, 2008
ISBN: 978-1-4244-1753-7
S.317-320
International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) <13, 2003, Hakone>
Englisch
Konferenzbeitrag
Fraunhofer IISB ()
MOSFET; SOI; rapid thermal annealing; TCAD

Abstract
In this work, the influences of advanced annealing schemes, spike and flash annealing and combinations of them, on the electrical behavior of modern FD SOI MOSFETs have been investigated by numerical simulations. Process simulations have been performed for comparing the two-dimensional diffusion behavior of the dopants under the different annealing schemes. Device simulations have been performed for making conclusions about how the different annealing schemes are influencing the static and dynamic behavior of modern CMOS devices.

: http://publica.fraunhofer.de/dokumente/N-82984.html