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Simulative buffer analysis of local image processing algorithms described by windowed synchronous data flow

 
: Keinert, J.; Haubelt, C.; Teich, J.

:

Blume, H. ; Institute of Electrical and Electronics Engineers -IEEE-:
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, IC-SAMOS 2007 : Samos, Greece, 16 - 19 July 2007
Piscataway, NJ: IEEE Service Center, 2007
ISBN: 1-424-41058-4
S.161-168
International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation <2007, Agios Konstantinos>
Englisch
Konferenzbeitrag
Fraunhofer IIS ()
buffer storage; data-compression; embedded system; image coding; multidimensional-signal-processing; real time system

Abstract
Embedded real-time image processing applications working on large images have to process and store huge amounts of data. Consequently the organization of the memory buffers and the precise determination of the required buffer sizes are critical steps for efficient system implementation. In this paper, we propose a new method, that permits the analysis to be performed automatically for local image processing algorithms. The latter ones are specified by help of the windowed synchronous data flow (WSDF) model, a multi-dimensional model of computation which has been especially designed to represent local image processing algorithms. This paper introduces a corresponding buffer organization leading to solutions comparable to hand-built designs concerning the required memory. Special care is taken, so that also large problems in terms of the image size can be analyzed. The applicability of our approach is demonstrated by help of a JPEG2000 decoder model.

: http://publica.fraunhofer.de/dokumente/N-77336.html