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2004
Conference Paper
Titel
Investigations on the reliability of lead-free CSP subjected to harsh environments
Abstract
A study of the performance of Flip-Chip Chip-Scale Packages (FC-CSPs) with lead-free solder interconnects was undertaken. The parametric studies on the CSPs were performed considering a wide variation of geometric and material parameters. Two geometrical versions on organic interposer with different die sizes were investigated theoretically and experimentally by thermal cycling tests -40 °C to 150 °C. In the FE-analyses, several additional parameters were examined including BT-interposer thickness, standoff, perimeter vs. full array, and solder-mask defined vs. non-solder-mask defined (NSMD) balls. Underfilling of the CSPs was an additional option. In the finite element analyses (FEA) both SnAg and SnAgCu solders were considered. For the latter a newly developed combined primary-secondary creep law was applied in the calculations. Both the inelastic strain (creep strain) and dissipated strain energy density represent suitable indicators to evaluate cyclic damage. It is demonstrated that for a thermal test cycle both measures result in similar critical cycle numbers. The calculations show that the creep strain always concentrates at the interfaces of the balls to the package. Maximum straining typically occurs at the inner ball row. Major effects on ball fatigue life are shown to be standoff height, ball geometry on both sides non solder mask defined (NSMD), and a stiff underfill. It is also shown that the CSP reliability using a soft underfill with high CTE or a similar "avarage soft underfill layer", composed of the soldermask layers and the underfill itself, can be worse than for a non-underfilled CSP. Testing results are compared to theoretical predictions. In many cases they agree reasonably well. Finally, differences between simulation and testing results are discussed.