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Low Power CMOS Thyristor-Based Relaxation Oscillator with Efficient Current Compensation

 
: Jotschke, Marcel; Palanisamy, Gokulkumar; Carvajal Ossa, Wilmar; Prabakaran, Harsha; Koh, Jeongwook; Kuhl, Matthias; Krautschneider, Wolfgang H.; Reich, Torsten; Mayr, Christian

:

Nurmi, J. ; Institute of Electrical and Electronics Engineers -IEEE-:
IEEE Nordic Circuits and Systems Conference, NORCAS 2021. Proceedings : October 26-27, 2021, Oslo, Norway, virtual conference
Piscataway, NJ: IEEE, 2021
ISBN: 978-1-6654-0713-7
ISBN: 978-1-6654-0712-0
5 S.
Nordic Circuits and Systems Conference (NORCAS) <7, 2021, Online>
Fraunhofer-Gesellschaft FhG
ZEPOWEL
Towards Zero Power Electronics
Englisch
Konferenzbeitrag
Fraunhofer IIS, Institutsteil Entwicklung Adaptiver Systeme (EAS) ()

Abstract
This paper presents a microwatt voltage-mode relaxation oscillator, whose main innovation is the utilization of CMOS thyristor circuits as decision elements. It provides stable on-chip 140 kHz clock source for ultra-low power autonomous systems. The employment of CMOS thyristors reduces the dynamic power consumption compared to the classical topology, but introduces strong PTAT temperature dependency. This is compensated by a CTAT current reference, which recycles parts of the PTAT bias generation block and therefore relaxes overall chip area and power penalty. The reference start-up time is effectively decreased by a modified start-up circuit, which shortens system power-on. The oscillator excluding the recycled PTAT occupies 0.09 sqmm and draws 907.4 nW from 1.8 V supply, resulting in a Figure-of-Merit of 6.5 nW/kHz. With the PTAT reference accounted, 1.20 uW, 8.6 nW/kHz and 0.11 sqmm were achieved. Measurements show a temperature coefficient of -514.7 ppm/K in the range of -40°C to 85°C with the proposed compensation, achieving an improvement of 5.5 times compared to the simulated uncompensated case. The frequency variation is 2.62%/V within supply voltage range of 1.5 V to 2.5 V.

: http://publica.fraunhofer.de/dokumente/N-643506.html