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A Low-Power RRAM Memory Block for Embedded, Multi-Level Weight and Bias Storage in Artificial Neural Networks

 
: Pechmann, Stefan; Mai, Timo; Potschka, Julian; Reiser, Daniel; Reichel, Peter; Breiling, Marco; Reichenbach, Marc; Hagelauer, Amelie

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Volltext ()

Micromachines 12 (2021), Nr.11, Art. 1277, 15 S.
ISSN: 2072-666X
Bundesministerium für Bildung und Forschung BMBF (Deutschland)
LO3-ML
Low-Power Low-Memory Low-Cost EKG-Signalanalyse mit ML-Algorithmen
Englisch
Zeitschriftenaufsatz, Elektronische Publikation
Fraunhofer IIS, Institutsteil Entwicklung Adaptiver Systeme (EAS) ()
Fraunhofer IIS ()
Fraunhofer EMFT ()
artificial neural networks (ANN); low power; embedded memory; memory block; multi-level; RRAM

Abstract
Pattern recognition as a computing task is very well suited for machine learning algorithms utilizing artificial neural networks (ANNs). Computing systems using ANNs usually require some sort of data storage to store the weights and bias values for the processing elements of the individual neurons. This paper introduces a memory block using resistive memory cells (RRAM) to realize this weight and bias storage in an embedded and distributed way while also offering programming and multi-level ability. By implementing power gating, overall power consumption is decreased significantly without data loss by taking advantage of the non-volatility of the RRAM technology. Due to the versatility of the peripheral circuitry, the presented memory concept can be adapted to different applications and RRAM technologies.

: http://publica.fraunhofer.de/dokumente/N-642934.html