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Post-Quantum Secure Boot

: Kumar, Vinay B.Y.; Gupta, Naina; Chattopadhyay, Anupam; Kasper, Michael; Krauß, Christoph; Niederhagen, Ruben


Natale, G. di ; European Design Automation Association -EDAA-:
Design, Automation and Test in Europe Conference and Exhibition, DATE 2020. Proceedings : 9th - 13th March 2020, Grenoble, France
Piscataway, NJ: IEEE, 2020
ISBN: 978-3-9819263-4-7
ISBN: 978-1-72814-468-9
Design, Automation and Test in Europe Conference and Exhibition (DATE) <2020, Grenoble>
Singapore National Research Foundation
NRF2018NCRNCR002-0001; SOCure
Fraunhofer SIT ()
Fraunhofer Singapore ()
secure SoC; secure boot; PQC; XMSS; RISC-V; Lead Topic: Digitized Work; Research Line: Machine Learning (ML); computer security; field-programmable gate array (FPGA); hash function

A secure boot protocol is fundamental to ensuring the integrity of the trusted computing base of a secure system. The use of digital signature algorithms (DSAs) based on traditional asymmetric cryptography, particularly for secure boot, leaves such systems vulnerable to the threat of quantum computers. This paper presents the first post-quantum secure boot solution, implemented fully as hardware for reasons of security and performance. In particular, this work uses the eXtended Merkle Signature Scheme (XMSS), a hash-based scheme that has been specified as an IETF RFC. The solution has been integrated into a secure SoC platform around RISC-V cores and evaluated on an FPGA and is shown to be orders of magnitude faster compared to corresponding hardware/software implementations and to compare competitively with a fully hardware elliptic curve DSA based solution.