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A 16-dBm D-Band Power Amplifier with a Cascaded CE and CB Output Power Stage Using a Stub Matching Topology

 
: Sene, B.; Knapp, H.; Li, H.; Kammerer, J.; Majied, S.; Aufinger, K.; Fritzin, J.; Reiter, D.; Pohl, N.

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Institute of Electrical and Electronics Engineers -IEEE-:
IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium, BCICTS 2019 : 3-6 November 2019, Nashville
Piscataway, NJ: IEEE, 2019
ISBN: 978-1-7281-0586-4
ISBN: 978-1-7281-0587-1
4 S.
BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS)<2019, Nashville/Tenn.>
European Commission EC
H2020; 737454; TARANTO
TowARds Advanced bicmos NanoTechnology platforms for rf and thz applicatiOns
Englisch
Konferenzbeitrag
Fraunhofer FHR ()

Abstract
This work presents the design of a power amplifier (PA) with an AC-coupled common-emitter and common-base stage in a 130 nm SiGe BiCMOS technology. The amplifier operates in the D-band and consists of two driving stages followed by an output power stage. At 143 GHz a small signal gain of 39.8 dB and a maximum saturated output power (P SAT ) of 16 dBm is achieved. The PAE peak value is 5.4 %, while the chip draws 220 mA from a 3.3 V power supply. Including pads the chip consumes an area of 0.66 mm 2 . To the best of the authors' knowledge this is the highest value for P SAT reported in this frequency range using silicon-based technologies.

: http://publica.fraunhofer.de/dokumente/N-585543.html