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Impact of mechanical strain on 22 nm FDSOI device performance using nanoindentation

: Schlipf, Simon; Clausner, André; Paul, Jens; Capecchi, Simone; Kurz, G.; Zschech, Ehrenfried


Institute of Electrical and Electronics Engineers -IEEE-; IEEE Electron Devices Society; IEEE Reliability Society:
IEEE International Integrated Reliability Workshop, IIRW 2019 : Fallen Leaf Lake, California, October 13-17, 2019
Piscataway, NJ: IEEE, 2019
ISBN: 978-1-7281-2203-8
ISBN: 978-1-7281-2201-4
ISBN: 978-1-7281-2204-5
International Integrated Reliability Workshop (IIRW) <2019, Fallen Leaf Lake/Calif.>
Fraunhofer IKTS ()
chip-package interaction (CPI); FDSOI; chip-board interaction (CBI); ring oscillator (RO); piezoresistance; nanoindentation; FEM simulation

A novel nanoindentation technique is used to investigate the influence of mechanical strain on integrated circuit performance. The approach aims to investigate localized stress fields caused by Chip-package interaction and resulting reversible transistor parameter deviations due to the piezoresistive effect. Nanoindentation enables controlled localized loads with high lateral precision and to apply consecutive loading conditions to a single test device. Newly designed ring oscillator test structures manufactured in the 22 nm FDSOI technology node enable a high sensitivity to mechanical load. They were used to monitor the strain effect on the transistors performance. Complementary FEM simulations provide deeper insight into the occurring stress tensor components and their respective impact. The results give an estimation for package related stress influences on devices based on the established correlation of mechanical load/strain and devices performance.