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Influence of shallow pits and device design of 4H-SiC VDMOS transistors on in-line defect analysis by using PL scanning

Poster presented at 18th International Conference on Silicon Carbide & Related Materials, September 29th - October 04th, 2019, Kyoto, Japan
 
: Kocher, Matthias; Schlichting, Holger; Kallinger, Birgit; Rommel, Mathias; Bauer, Anton J.; Erlbacher, Tobias

:
Poster urn:nbn:de:0011-n-5620770 (2.5 MByte PDF)
MD5 Fingerprint: e50497979b59aaa63984bc10cb2fb6cc
Erstellt am: 30.10.2019


2019, 1 Folie
International Conference on Silicon Carbide and Related Materials (ICSCRM) <2019, Kyoto>
Englisch
Poster, Elektronische Publikation
Fraunhofer IISB ()

: http://publica.fraunhofer.de/dokumente/N-562077.html