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Post-CMOS 3D-integration of a nanopellistor

 
: Münchenberger, Finja M.; Dreiner, Stefan; Kappert, Holger; Vogt, Holger

:

Institute of Electrical and Electronics Engineers -IEEE-:
15th Conference on PhD Research in Microelectronics and Electronics, PRIME 2019. Conference proceedings : 15 - 18 July 2019, Lausanne, Switzerland
Piscataway, NJ: IEEE, 2019
ISBN: 978-1-7281-3550-2
ISBN: 978-1-7281-3549-6
S.109-112
Conference on Ph.D. Research in Microelectronics and Electronics (PRIME) <15, 2019, Lausanne>
Englisch
Konferenzbeitrag
Fraunhofer IMS ()
Pellistor; 3D-Integration; catalytic gas sensors; atomic layer deposition (ALD); nanostructure

Abstract
To further optimize micro pellistors and reduce the required chip area, one possibility is to fabricate the sensor on top of the integrated circuit (IC). Therefore, a sacrificial layer process developed by the Fraunhofer IMS combining deep reactive ion etching (DRIE) and atomic layer deposition (ALD) is modified. First fundamentals of pellistors and Joule heating are described. Then simulations to determine ideal heater shapes are presented and an approach for a process to fabricate pellistors on top of an IC is introduced.

: http://publica.fraunhofer.de/dokumente/N-555049.html