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Earthquake: A NoC-based optimized differential cache-collision attack for MPSoCs

: Reinbrecht, C.; Forlin, B.; Zankl, A.; Sepúlveda, J.


Madsen, J. ; European Design Automation Association -EDAA-; Institute of Electrical and Electronics Engineers -IEEE-, Council on Electronic Design Automation; European Electronic Chips & Systems design Initiative -ECSI-, Gieres; Association for Computing Machinery -ACM-, Special Interest Group on Design Automation -SIGDA-:
Design, Automation & Test in Europe, DATE 2018. Proceedings : 19-23 March 2018, Dresden, Germany
Piscataway, NJ: IEEE, 2018
ISBN: 978-3-9819263-0-9
ISBN: 978-3-9819263-1-6
Design, Automation & Test in Europe Conference & Exhibition (DATE) <21, 2018, Dresden>
Fraunhofer AISEC ()

Multi-Processor Systems-on-Chips (MPSoCs) are a platform for a wide variety of applications and use-cases. The high on-chip connectivity, the programming flexibility, and the reuse of IPs, however, also introduce security concerns. Problems arise when applications with different trust and protection levels share resources of the MPSoC, such as processing units, cache memories and the Network-on-Chip (NoC) communication structure. If a program gets compromised, an adversary can observe the use of these resources and infer (potentially secret) information from other applications. In this work, we explore the cache-based attack by Bogdanov et al., which infers the cache activity of a target program through timing measurements and exploits collisions that occur when the same cache location is accessed for different program inputs. We implement this differential cache-collision attack on the MPSoC Glass and introduce an optimized variant of it, the Earthquake Attack, which leverages the NoC-based communication to increase attack efficiency. Our results show that Earthquake performs well under different cache line and MPSoC configurations, illustrating that cache-collision attacks are considerable threats on MPSoCs.