Hier finden Sie wissenschaftliche Publikationen aus den Fraunhofer-Instituten.

Power system stability studies including real hardware using phasor power hardware-in-the-loop technology

: Brandl, R.; Montoya, J.; Degner, T.; Strauss-Mincu, D.

Postprint urn:nbn:de:0011-n-5204153 (563 KByte PDF)
MD5 Fingerprint: ff2875630df684cba992b86085dfe651
© IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Erstellt am: 18.6.2019

Institute of Electrical and Electronics Engineers -IEEE-; IEEE Industrial Electronics Society -IES-:
IEEE International Conference on Industrial Electronics for Sustainable Energy Systems, IESES 2018. Proceedings : 30 Jan.-2 Feb. 2018, Hamilton, New Zealand
Piscataway, NJ: IEEE, 2018
ISBN: 978-1-5090-4974-5
ISBN: 978-1-5090-4975-2
International Conference on Industrial Electronics for Sustainable Energy Systems (IESES) <2018, Hamilton>
European Commission EC
H2020; 654113; ERIGrid
European Research lnfrastructure supporting Smart Grid
Konferenzbeitrag, Elektronische Publikation
Fraunhofer IEE ()
phasor simulation; phasor-EMT conversion; power system stability; power hardware-in-the-loop

Stability is a main topic in the field of power systems. Due to the change of the conventional power generation plants to a more flexible distributed solution by adding renewable energy resources, power system stability will be getting more complex in future scenarios. Many studies and researches are currently under investigation to ensure a safe future power system. Badly is the state-of-the-art that power systems studies and component testing are mostly separated. Technologies like power hardware-in-the-loop showed a good solution over the last decade to close this gap. However, normal power system studies will be made by the use of phasor simulations. To increase the functionality of hardware-in-the-loop systems and closing the gap between simulation studies and component testing, this paper presents an explanation to combine phasor simulations and hardware-under-test testing.