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Resistor network modeling of microscopic transfer length measurements at bilayer systems for heterojunction solar cells

: Habibi, M.; Kaufmann, K.; Naumann, V.; Hagendorf, C.


Ballif, C. ; American Institute of Physics -AIP-, New York:
SiliconPV 2018, 8th International Conference on Crystalline Silicon Photovoltaics : 19-21 March 2018, Lausanne, Switzerland
Woodbury, N.Y.: AIP, 2018 (AIP Conference Proceedings 1999)
ISBN: 978-0-7354-1715-1
International Conference on Crystalline Silicon Photovoltaics (SiliconPV) <8, 2018, Lausanne>
Fraunhofer CSP ()

The microscopic transfer length measurement (µ-TLM) is a new TLM based method at µm-dimensions to measure the electrical resistivity of different layers in multilayer systems such as heterojunction silicon solar cells. Since, depending on layer thicknesses and confinement of current paths, the layer resistivity does not directly result from the µ-TLM measurement alone, a simulation is needed for arbitrary dimensions of TLM patterns. In this work, we present a resistor network model to simulate the µ-TLM measurement at bilayer stacks. µ-TLM patterns are created by laser ablation on (1) a SnO2/FTO bilayer structure on glass as a model system and (2) ZnO on crystalline Si substrate. Both sample systems are measured experimentally using the µ-TLM technique. In order to obtain resistivity values of single layers in sample stacks, the simulation is pursued by fitting the experimental data. The resistivity values are compared with the measured resistivity of the individual layers on glass and of the bare Si wafer, respectively, based on the conventional four-point-probe (4PP) technique. Although there is a discrepancy between the curvature of the graphs of the simulation and the experiment for the ZnO on c-Si layer stack, the results acquired by µ-TLM and subsequent simulation are in the same order of magnitude as the 4PP reference data. Thus, an estimation of the resistivity values of single layers within a multilayer stack is possible by combination of µ-TLM measurements and the corresponding circuit model simulation.