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Failure Analysis Techniques for 3D Packages

: Altmann, F.; Brand, S.; Petzold, M.


Institute of Electrical and Electronics Engineers -IEEE-; IEEE Electron Devices Society; IEEE Reliability Society:
25th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2018 : 16-19 July 2018
Piscataway, NJ: IEEE, 2018
ISBN: 978-1-5386-4929-9
ISBN: 978-1-5386-4930-5
International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) <25, 2018, Singapore>
Fraunhofer IMWS ()

3D packing technologies integrate different components in three dimensions in one device to increase performance, functional density and reduce the devices footprint. Due to the increasing complexity and the miniaturization new and specifically 3D-adapted failure analysis methods and corresponding workflows are required to cover technology qualification as well as for process and quality control. This paper will give an overview of available and recently developed failure analysis techniques suitable for 3D packaged devices. In particular, the potential of lock in thermography and high resolution scanning acoustic microscopy for defect localization and new laser and focused ion beam-based techniques for efficient sample preparation will be highlighted. Their application is demonstrated in case studies performed at stacked die devices and Through Silicon Via interconnects.